The overlay approach -FPGA over FPGA- has a number of expected benefits, including bitstream compatibility between different vendors and parts, fast reconfiguration and, more generally, ease of use. However the number of complex engineering tasks to design, explore and make use of such overlays severely restrains their diffusion. This paper presents a downloadable integrated tool flow named Argen. Argen supports defining reconfigurable architecture and generating the corresponding overlay along with its System-on-chip exploitation environment.