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Communication Dans Un Congrès Année : 2014

A Prototyping Platform for Virtual Reconfigurable Units

Loïc Lagadec
Théotime Bollengier
  • Fonction : Auteur


Virtualization has been a key enabler for trading raw performances for programmability, straightforward reuse and higher abstraction in the software world. Similarly, Virtual FPGAs define intermediate fabrics, on which to implement applications regardless of the physical target. In order to make legacy applications run on up-to-date targets, only porting the vFPGAs to these targets is required, resulting in factorizing the development costs. Virtualization has a cost though, that one can reduce by tailoring the vFPGA based on applications class requirements. Then, prototyping Virtual FPGAs comes to be central. This paper introduces a platform dedicated to prototyping virtual FPGAs. We offer to generate vFPGA based on ADL specification along with exploitation tools. vFPGAs appear as IPs to be embedded into the platform
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Dates et versions

hal-01006128 , version 1 (13-06-2014)


  • HAL Id : hal-01006128 , version 1


Loïc Lagadec, Jean-Christophe Le Lann, Théotime Bollengier. A Prototyping Platform for Virtual Reconfigurable Units. RECOSOC 2014, May 2014, Montpellier, France. ⟨hal-01006128⟩
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