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A framework for high-level synthesis of heterogeneous MP-SoC

Youenn Corre , Jean-Philippe Diguet , Dominique Heller , Loic Lagadec
GLSVLSI, May 2012, Salt Lake City, United States. pp.283-286, ⟨10.1145/2206781.2206850⟩
Communication dans un congrès hal-00726481v1

MHPM : Multi-Scale Hybrid Programming Model A flexible parallelization Medthodology

Nader Khammassi , Jean-Christophe Le Lann , Jean-Philippe Diguet , Alexandre Skrzyniarz
HPCC 2012, Jun 2012, Liverpool, United Kingdom
Communication dans un congrès hal-00728364v1

A Design Approach to Automatically Generate On-Chip Monitors during High-Level Synthesis of Hardware Accelerator

Mohamed Ben Hammouda , Philippe Coussy , Loic Lagadec
GLSVLSI 2014, May 2014, Houston, United States
Communication dans un congrès hal-01009551v1

Method for controlling a set of robots, and set of robots

Jean-Philippe Brunet , Thomas Sousselier , Johann Dreo , Luc Jaulin
United States, Patent n° : US20150331421. 2015
Brevet hal-01255219v1

A Role Language to Interpret Multi-Formalism System of Systems Models

Jean-Philippe Schneider , Joël Champeau , Ciprian Teodorov , Eric Senn , Loic Lagadec
Syscon 2015, IEEE, Apr 2015, Vancouver, Canada
Communication dans un congrès hal-01156518v1

Fast Template-based Heterogeneous MPSoC Synthesis on FPGA

Youenn Corre , Jean-Philippe Diguet , Loic Lagadec , Dominique Heller , Dominique Blouin
9th Int. Symposium on Applied Reconfigurable Computing, Mar 2013, Los Angeles, United States
Communication dans un congrès hal-00780378v1

Role Framework to Support Collaborative Virtual Prototyping of System of Systems

Jean-Philippe Schneider , Joël Champeau , Loïc Lagadec , Eric Senn
WETICE 2015, IEEE, Jun 2015, Larnaca, Cyprus
Communication dans un congrès hal-01192720v1

Design Approach to Automatically Synthesize ANSI-C Assertions during High-Level Synthesis of Hardware Accelerators

Mohamed Ben Hammouda , Philippe Coussy , Loïc Lagadec
ICSAS 2014 - International symposium on circuits and systems, Jun 2014, Melbourne, Australia
Communication dans un congrès hal-01009572v1
Image document

TBES: Template-Based Exploration and Synthesis of Heterogeneous Multiprocessor Architectures on FPGA

Youenn Corre , Jean-Philippe Diguet , Dominique Heller , Dominique Blouin , Loïc Lagadec
ACM Transactions on Embedded Computing Systems (TECS), 2016, 15 (1), pp.9
Article dans une revue hal-01172103v1

Predictibility of inter-components latency in a Software Communications Architecture Open Environment

Gael Abgrall , Frederic Le Roy , Jean-Philippe Delahaye , Jean-Philippe Diguet , Guy Gogniat
24th IEEE International Parallel and Distributed Processing Symposium, Apr 2010, Atlanta, United States
Communication dans un congrès hal-00486627v1

HLS-based Fast Design Space Exploration of ad hoc hardware accelerators: a key tool for MPSoC Synthesis on FPGA

Youenn Corre , Van-Trinh Hoang , Jean-Philippe Diguet , Dominique Heller , Loic Lagadec
International Conference on Design and Architectures for Signal and Image Processing (DASIP), Oct 2012, Germany
Communication dans un congrès hal-00747713v1
Image document

Conception et validation d'un algorithme de mise en formation d'essaim de micro-robots sous-marins auto-organisés

Thomas Sousselier
Recherche opérationnelle [cs.RO]. Université Européenne de Bretagne; Université de Bretagne-Sud, 2013. Français. ⟨NNT : ⟩
Thèse tel-01096431v1

A Design Approach to Automatically Synthesize ANSI-C Assertions during High-Level Synthesis of Hardware Accelerators

Mohamed Ben Hammouda , Philippe Coussy , Loic Lagadec
ISCAS 2014 - IEEE International Symposium on Circuits and Systems, May 2014, Melbourne, Australia. pp.XX
Communication dans un congrès hal-00944548v1

Une approche de conception pour générer automatiquement des moniteurs sur puce pendant la synthèse de haut niveau d'accélérateurs matériels

Mohamed Ben Hammouda , Philippe Coussy , Loïc Lagadec
COMPAS 2014 - Conférence en Parallélisme, Architecture et Système, Apr 2014, Neuchâtel, Suisse
Communication dans un congrès hal-00989918v1

A Comparative Study of Two Software Defined Radio Environments

Gael Abgrall , Frederic Le Roy , Jean-Philippe Delahaye , Jean-Philippe Diguet , Guy Gogniat
SDR Forum Technical Conference, Oct 2008, Washington, United States
Communication dans un congrès hal-00486625v1

Latency estimation due to middleware used in Software Defined Radio Platform

Gael Abgrall , Frederic Le Roy , Jean-Philippe Delahaye , Jean-Philippe Diguet , Guy Gogniat
6th Workshop on Software Radio, Mar 2010, Karlsruhe, Germany
Communication dans un congrès hal-00486626v1

Towards a Dynamic Infrastructure for Playing withSystems of Systems

Jean-Philippe Schneider , Ciprian Teodorov , Eric Senn , Joël Champeau
ECSA 2014, Aug 2014, Vienne, Austria
Communication dans un congrès hal-01090362v1

A Unified Design Flow to Automatically Generate On-Chip Monitors during High-Level Synthesis of Hardware Accelerators

Mohamed Ben Hammouda , Philippe Coussy , Loïc Lagadec
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2017, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 36 (3), pp.384-397. ⟨10.1109/TCAD.2016.2587278⟩
Article dans une revue hal-01405531v1